Time-domain computing for Boolean logic using STT-MRAM
نویسندگان
چکیده
With the development of artificial intelligence, separation memory and processor in traditional von-Neumann architecture has led to bottleneck data transmission hindering energy efficient computing. The computing-in-memory (CIM) paradigm is expected solve problems wall power wall. In this work, we propose a time-domain (TD) computing scheme based on spin transfer torque magnetic random access (STT-MRAM). Basic Boolean logic operations, such as AND/OR/Full-adder (FA), are implemented through converting bit-line voltage time delay time-to-digital converter (TDC). proposal simulated using 28 nm CMOS process 40 MTJ compact model. Monte-Carlo simulations show that 94.2% 100% computation accuracy can be obtained AND/OR FA 2.5 ns 3.5 ns. consumption achieve 59.43 fJ 97.56 fJ, respectively.
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ژورنال
عنوان ژورنال: AIP Advances
سال: 2023
ISSN: ['2158-3226']
DOI: https://doi.org/10.1063/9.0000378